Method for forming a finfet structure

ABSTRACT

A method for forming a FinFET structure includes providing a substrate, a first region and a second region being defined on the substrate, a first fin structure and a second fin structure being disposed on the substrate within the first region and the second region respectively. A first oxide layer cover the first fin structure and the second fin structure. Next a first protective layer and a second protective layer are entirely formed on the substrate and the first oxide layer in sequence, the second protective layer within the first region is removed, and the first protective layer within the first region is then removed. Afterwards, the first oxide layer covering the first fin structure and the second protective layer within the second region are removed simultaneously, and a second oxide layer is formed to cover the first fin structure.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a divisional application of U.S. patent applicationSer. No. 14/079,648 filed Nov. 14, 2013, which is herein incorporated byreference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to fin-type field effecttransistors (FinFET) and more particularly to the method for forming animproved FinFET structure that includes multiple gate dielectricthicknesses.

2. Description of the Prior Art

Semiconductor structure includes both passive semiconductor devices suchas resistors, as well as active devices such as transistors and diodes.Field effect transistor devices are common transistor devices withinsemiconductor structures.

Field effect transistor structure and device dimensions have been scaledeffectively to increasingly smaller dimensions over the period ofseveral decades. Various field effect transistor structures havingdesirable properties are known in the semiconductor fabrication art. Onerecent advance in transistor technology is the introduction of fin typefield effect transistors that are known as FinFET.

In the conventional process, the method for forming individual FinFETson one substrate comprises: first, a substrate having at least two finstructure is provided, and a first oxide layer is then formed on thesetwo fin structures, next, parts of the first oxide layer, especially theportion that covers on one of the fin structure is then removed,afterwards, a second oxide layer is then formed on the exposed finstructure. However, since there is no other layer that is formed duringthe process, the fin structure or the isolating region surrounding eachfin structure is easily damaged by the etching processes, influencingthe yield and the performance of the FinFET.

SUMMARY OF THE INVENTION

The present invention provides a method for forming a FinFET structure,at least comprising the following steps: first, a substrate is provided,a first region and a second region are defined on the substrate, a firstfin structure and a second fin structure are disposed on the substrate,within the first region and the second region respectively, a firstoxide layer covering the first fin structure and the second finstructure, next a first protective layer and a second protective layerare entirely formed on the substrate and the first oxide layer insequence, the second protective layer within the first region isremoved, the first protective layer within the first region is thenremoved, afterwards, the first oxide layer covering the first finstructure and the second protective layer within the second region areremoved simultaneously, and a second oxide layer is formed to cover thefirst fin structure.

The features of the present invention further comprise a firstprotective layer and a second protective layer, which are made ofdifferent materials, for example, in the embodiment mentioned above. Thefirst protective layer comprises silicon nitride, and the secondprotective layer comprises silicon oxide, and these two dielectriclayers protect the oxide region disposed in the substrate andsurrounding the fin structure from the damages occurring during theetching processes. Besides, since the silicon nitride first protectivelayer has high selectivity with the first oxide layer disposed on thefin structure and the oxide region, so during the process for removingthe silicon nitride first protective layer, the first oxide layer andthe oxide region will not be ruined by the etching processes, therebyenhancing the yield and the performance of the FinFET.

These and other objectives of the present invention will no doubt becomeobvious to those of ordinary skill in the art after reading thefollowing detailed description of the preferred embodiment that isillustrated in the various figures and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1-9 are schematic diagrams showing the manufacturing process forforming a FinFET structure according to one preferred embodiment of thepresent invention.

DETAILED DESCRIPTION

To provide a better understanding of the present invention to usersskilled in the technology of the present invention, preferredembodiments are detailed as follows. The preferred embodiments of thepresent invention are illustrated in the accompanying drawings withnumbered elements to clarify the contents and effects to be achieved.

Please note that the figures are only for illustration and the figuresmay not be to scale. The scale may be further modified according todifferent design considerations. When referring to the words “up” or“down” that describe the relationship between components in the text, itis well known in the art and should be clearly understood that thesewords refer to relative positions that can be inverted to obtain asimilar structure, and these structures should therefore not beprecluded from the scope of the claims in the present invention.

FIGS. 1-9 are schematic diagrams showing the manufacturing process forforming a FinFET structure according to one preferred embodiment of thepresent invention. As shown in FIG. 1, first, a substrate 10 isprovided, such as a silicon substrate. There are at least two finstructures 12 on the substrate 10, and an oxide region 14, disposed onthe substrate 10 and surrounding the fin structure 12. Usually, theoxide region such as the shallow trench isolation (STI), is used toisolate different components on the substrate 10. A first oxide layer 16is disposed on the fin structures 12, but does not cover the oxideregion 14. In other words, the oxide region 14 is exposed. In addition,there are two regions: a first region A and a second region B which aredefined on the substrate, the region A and region B comprising at leastone fin structure 12 therein. It is worth noting that in the followingprocess, devices with different oxide layer thicknesses will be formedin the region A and in the region B respectively, such as the lowvoltage (LV) devices, the memory, the core devices,electrostatic-sensitive device (ESD), IO devices or high voltage (HV)devices, and these devices have different oxide layer thicknesses.

Please refer to FIGS. 2-3, a first protective layer 18 and a secondprotective layer 20 are then formed in sequence, covering the firstoxide layer 16 and the oxide region 14. In this embodiment, the firstprotective layer 18 comprises silicon nitride, and the second protectivelayer 20 comprises silicon oxide. The first protective layer 18 and thesecond protective layer 20 are preferably formed through an atomic layerdeposition (ALD) process, but not limited thereto.

Next, please refer to FIGS. 4-5. As shown in FIG. 4, a patternedphotoresist layer 22 is formed on the second protective layer 20 withinthe second region B. As shown in FIG. 5, an etching process (not shown)is then performed, to remove parts of the second protective layer 20which are not covered by the photoresist layer 22. In other words, onlythe second protective layer 20 within the first region A is removed.Afterwards, the patterned photoresist layer 22 is then removed. In thisembodiment, the etching process for removing the second protective layer20 comprises a dilute hydrofluoric acid (DHF) containing cleaningprocess, a sulfuric acid-hydrogen peroxide mixture (SPM) containingcleaning process or a standard clean 1 (SC1) process, but not limitedthereto. It is worth noting that, in this step, the first protectivelayer 18 still remains on the oxide region 14 and on the first oxidelayer 16, helping protect the first oxide layer 16 and the oxide region14 from damages occurring during the etching process.

Please refer to FIG. 6. Another etching process is then performed toremove the first protective layer 18 within the first region A. In thisstep, the etching process uses the solvent such as phosphate (H3PO4)which has high selectivity to the silicon nitride and the silicon oxide.In other words, only the first protective layer 18 mainly made ofsilicon nitride can easily be removed by the etching process, but thesecond protective layer 20 and the oxide region 14 mainly made ofsilicon oxide are hardly removed by the etching process, so the oxideregion 14 disposed under the first protective layer 18 is not easilyruined by the etching process.

Please refer to FIG. 7. An etching process (not shown) is performed, toremove the first oxide layer 16 disposed on the fin structure 12 withinthe region A, and the second protective layer 20 within the secondregion B simultaneously, so as to completely remove the first oxidelayer 16 and to expose the fin structure 12 within the first region A.Since in this embodiment, both the first oxide layer 16 and the secondprotective layer 20 mainly comprise silicon oxide, they can be removedin a same etching process simultaneously. It is worth noting that, inorder to avoid the oxide region 14 being damaged by the etching process,in this step, the etching process preferably selects a dry-etchingprocess. Usually, a dry-etching process has a better performance incontrolling the etching rate, so compared with a wet-etching process, adry-etching process is a preferred choice to avoid the oxide region 14from being damaged.

Afterwards, referring to FIGS. 8-9, the first protective layer 18 withinthe first region B is then removed, and as shown in FIG. 9, a secondoxide layer 24 is then formed to cover the exposed fin structure 12within the first region A. It is worth noting that the thickness of thefirst oxide layer 16 and the second oxide layer 24 are different.Preferably, the first oxide layer 16 is thicker than the second oxidelayer 24, thereby achieving two individual FinFETs on one substrate 10.For example, a FinFET 1 and a FinFET 2 are a n-FET device and a p-FETdevice respectively, or selected from the group of the low voltage (LV)devices, the memory, the core devices, electrostatic-sensitive device(ESD), IO devices or high voltage (HV) devices, and these devices havedifferent oxide layer thicknesses, having individual work functions.

In another case of the present invention, after the second protectivelayer 20 within the second region B is removed (corresponding to FIG.7), the second oxide layer 24 can be formed before the first protectivelayer 18 within the second region B is removed. In other words, thefirst protective layer 18 within the second region B may remain untilthe second oxide layer 24 is formed. This process should be contained inthe scope of the present invention. However, preferably forming thesecond oxide layer 24 is the final process in order to avoid the secondoxide layer 24 being exposed in air for a long time and influencing theperformance of the FinFET caused by oxidation.

In summary, the distinguishing feature of the present invention is theuse of a first protective layer and a second protective layer, which aremade of different materials. For example, in the embodiment mentionedabove, the first protective layer comprises silicon nitride, and thesecond protective layer comprises silicon oxide. These two dielectriclayers protect the oxide region disposed in the substrate and surroundthe fin structure from the damages occurring during the etchingprocesses. Besides, since the silicon nitride first protective layer hashigh selectivity with the first oxide layer disposed on the finstructure and the oxide region, during the process for removing thesilicon nitride first protective layer, the first oxide layer and theoxide region are not ruined by the etching processes, thereby enhancingthe yield and the performance of the FinFET.

Those skilled in the art will readily observe that numerousmodifications and alterations of the device and method may be made whileretaining the teachings of the invention. Accordingly, the abovedisclosure should be construed as limited only by the metes and boundsof the appended claims.

What is claimed is:
 1. A method for forming a FinFET structure, at leastcomprising the following steps: providing a substrate, a first regionand a second region being defined on the substrate, a first finstructure and a second fin structure being disposed on the substratewithin the first region and the second region respectively, a firstoxide layer covering the first fin structure and the second finstructure; forming a first protective layer and a second protectivelayer entirely on the substrate and the first oxide layer in sequence;removing the second protective layer within the first region; removingthe first protective layer within the first region; removing the firstoxide layer covering the first fin structure and the second protectivelayer within the second region; removing the first protective layerwithin the second region after the second protective layer within thesecond region is removed; and forming a second oxide layer covering thefirst fin structure, wherein the second oxide layer is formed before thefirst protective layer within the second region is removed.
 2. Themethod of claim 1, wherein the first oxide layer is thicker than thesecond oxide layer.
 3. The method of claim 1, wherein the first oxidelayer covering the first fin structure and the second protective layerwithin the second region are removed simultaneously.
 4. The method ofclaim 1, wherein the first protective layer comprises a silicon nitridelayer.
 5. The method of claim 1, wherein the second protective layercomprises a silicon oxide layer.
 6. The method of claim 1, furthercomprising forming an oxide region disposed in the substrate,surrounding the first fin structure and the second fin structure.
 7. Themethod of claim 1, wherein the surface of the first fin structure isexposed after the first oxide layer is removed from the first finstructure.
 8. The method of claim 1, wherein the method for removing thefirst oxide layer covering the first fin structure and the secondprotective layer within the second region comprises a dry-etchingprocess and a wet-etching process.